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Abstract

Title:

Power Management and Dynamic Voltage Scaling: Myths and Facts

Authors:

David C. Snowdon, Sergio Ruocco and Gernot Heiser

    School of Computer Science and Engineering
    University of New South Wales
    Sydney 2052 Australia
    
    National ICT Australia, Sydney, Australia

Abstract:

This paper investigates the validity of common approaches to power management based on dynamic voltage scaling (DVS). Using instrumented hardware and appropriate operating-system support, we account separately for energy consumed by the processor and the memory system.

We find that memory often contributes significantly to overall power consumption, which leads to a much more complex relationship between energy consumption and core voltage and frequency than is frequently assumed. As a consequence, we find that the voltage and frequency setting that minimises energy consumption is dependent on system characteristics, and, more importantly, on the application-specific balance of memory and CPU activity. The optimal setting of core voltage and frequency therefore requires either a-priori analysis of the application or, where this is not feasible, power monitoring at run time.

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